From fe903c0d9292cf54f44ef3ee6054a1377f2655d1 Mon Sep 17 00:00:00 2001 From: John-Mark Bell Date: Thu, 3 Nov 2022 19:31:20 +0000 Subject: Drop "hf" from arm-riscos-gnueabihf ABI triplet The way we configure this toolchain means that it will generate Risc PC-compatible ARMv4 binaries using the soft-float ABI. These are not compatible with the ARMv7 hard-float binaries produced by the upstream compiler, so change the triplet to avoid confusion. --- .../recipes/patches/gccsdk/unixlib-stdtime.p | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 arm-riscos-gnueabi/recipes/patches/gccsdk/unixlib-stdtime.p (limited to 'arm-riscos-gnueabi/recipes/patches/gccsdk/unixlib-stdtime.p') diff --git a/arm-riscos-gnueabi/recipes/patches/gccsdk/unixlib-stdtime.p b/arm-riscos-gnueabi/recipes/patches/gccsdk/unixlib-stdtime.p new file mode 100644 index 0000000..3ad890a --- /dev/null +++ b/arm-riscos-gnueabi/recipes/patches/gccsdk/unixlib-stdtime.p @@ -0,0 +1,17 @@ +Index: libunixlib/time/stdtime.c +=================================================================== +--- libunixlib/time/stdtime.c (revision 7698) ++++ libunixlib/time/stdtime.c (working copy) +@@ -23,9 +23,11 @@ + register const char *str __asm ("r4") = __str; + register const _kernel_oserror *err __asm ("r0"); + register char *term __asm ("r1"); ++ register size_t left __asm ("r2"); ++ register const char *ostr __asm ("r3"); + __asm__ volatile ("SWI\t%[SWI_Territory_ConvertDateAndTime]\n\t" + "MOVVC\tr0, #0\n\t" +- : "=r" (err), "=r" (term) ++ : "=r" (err), "=r" (term), "=r" (left), "=r" (ostr) + : "r" (territory), "r" (ro_time), "r" (buf), "r" (size), "r" (str), + [SWI_Territory_ConvertDateAndTime] "i" (Territory_ConvertDateAndTime | (1<<17)) + : "r14", "cc", "memory"); -- cgit v1.2.3