1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
|
--- crypto/arm_arch.h 2015-07-09 12:21:24.000000000 +0000
+++ crypto/arm_arch.h 2015-11-13 13:47:02.386910047 +0000
@@ -31,6 +31,8 @@
# define __ARM_ARCH__ 5
# elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
# define __ARM_ARCH__ 4
+# elif defined(__ARM_ARCH_3__)
+# define __ARM_ARCH__ 3
# else
# error "unsupported ARM architecture"
# endif
--- crypto/armcap.c 2015-07-09 12:21:24.000000000 +0000
+++ crypto/armcap.c 2015-11-13 15:12:20.385640267 +0000
@@ -7,6 +7,8 @@
#include "arm_arch.h"
+extern unsigned int __get_cpu_arch (void);
+
unsigned int OPENSSL_armcap_P;
static sigset_t all_masked;
@@ -67,13 +69,15 @@
sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
sigaction(SIGILL, &ill_act, &ill_oact);
- if (sigsetjmp(ill_jmp, 1) == 0) {
- _armv7_neon_probe();
- OPENSSL_armcap_P |= ARMV7_NEON;
- }
- if (sigsetjmp(ill_jmp, 1) == 0) {
- _armv7_tick();
- OPENSSL_armcap_P |= ARMV7_TICK;
+ if (__get_cpu_arch() == 0) {
+ if (sigsetjmp(ill_jmp, 1) == 0) {
+ _armv7_neon_probe();
+ OPENSSL_armcap_P |= ARMV7_NEON;
+ }
+ if (sigsetjmp(ill_jmp, 1) == 0) {
+ _armv7_tick();
+ OPENSSL_armcap_P |= ARMV7_TICK;
+ }
}
sigaction(SIGILL, &ill_oact, NULL);
--- crypto/modes/asm/ghash-armv4.pl 2015-07-09 12:21:24.000000000 +0000
+++ crypto/modes/asm/ghash-armv4.pl 2015-11-13 13:44:26.274913291 +0000
@@ -157,7 +157,14 @@
ldmia $Thh,{$Tll-$Thh} @ load Htbl[nhi]
add $nhi,$nhi,$nhi
eor $Zll,$Tll,$Zll,lsr#4
+#if __ARM_ARCH__>=4
ldrh $Tll,[sp,$nhi] @ rem_4bit[rem]
+#else
+ ldrb $Tll,[sp,$nhi]
+ add $nhi,$nhi,#1
+ ldrb $nhi,[sp,$nhi]
+ orr $Tll,$Tll,$nhi,lsl#8
+#endif
eor $Zll,$Zll,$Zlh,lsl#28
ldrb $nhi,[$Xi,#14]
eor $Zlh,$Tlh,$Zlh,lsr#4
@@ -180,7 +187,14 @@
eor $Zll,$Zll,$Zlh,lsl#28
eor $Zlh,$Tlh,$Zlh,lsr#4
eor $Zlh,$Zlh,$Zhl,lsl#28
+#if __ARM_ARCH__>=4
ldrh $Tll,[sp,$nlo] @ rem_4bit[rem]
+#else
+ ldrb $Tll,[sp,$nlo]
+ add $Tlh,$nlo,#1
+ ldrb $Tlh,[sp,$Tlh]
+ orr $Tll,$Tll,$Tlh,lsl#8
+#endif
eor $Zhl,$Thl,$Zhl,lsr#4
ldrplb $nlo,[$inp,$cnt]
eor $Zhl,$Zhl,$Zhh,lsl#28
@@ -195,7 +209,14 @@
ldrplb $Tll,[$Xi,$cnt]
eor $Zll,$Zll,$Zlh,lsl#28
eor $Zlh,$Tlh,$Zlh,lsr#4
+#if __ARM_ARCH__>=4
ldrh $Tlh,[sp,$nhi]
+#else
+ ldrb $Tlh,[sp,$nhi]
+ add $nhi,$nhi,#1
+ ldrb $nhi,[sp,$nhi]
+ orr $Tlh,$Tlh,$nhi,lsl#8
+#endif
eor $Zlh,$Zlh,$Zhl,lsl#28
eor $Zhl,$Thl,$Zhl,lsr#4
eor $Zhl,$Zhl,$Zhh,lsl#28
@@ -245,7 +266,14 @@
ldmia $Thh,{$Tll-$Thh} @ load Htbl[nhi]
add $nhi,$nhi,$nhi
eor $Zll,$Tll,$Zll,lsr#4
+#if __ARM_ARCH__>=4
ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
+#else
+ ldrb $Tll,[$rem_4bit,$nhi]
+ add $nhi,$nhi,#1
+ ldrb $nhi,[$rem_4bit,$nhi]
+ orr $Tll,$Tll,$nhi,lsl#8
+#endif
eor $Zll,$Zll,$Zlh,lsl#28
eor $Zlh,$Tlh,$Zlh,lsr#4
eor $Zlh,$Zlh,$Zhl,lsl#28
@@ -266,7 +294,14 @@
eor $Zll,$Zll,$Zlh,lsl#28
eor $Zlh,$Tlh,$Zlh,lsr#4
eor $Zlh,$Zlh,$Zhl,lsl#28
+#if __ARM_ARCH__>=4
ldrh $Tll,[$rem_4bit,$nlo] @ rem_4bit[rem]
+#else
+ ldrb $Tll,[$rem_4bit,$nlo]
+ add $Tlh,$nlo,#1
+ ldrb $Tlh,[$rem_4bit,$Tlh]
+ orr $Tll,$Tll,$Tlh,lsl#8
+#endif
eor $Zhl,$Thl,$Zhl,lsr#4
ldrplb $nlo,[$Xi,$cnt]
eor $Zhl,$Zhl,$Zhh,lsl#28
@@ -280,7 +315,14 @@
eor $Zll,$Tll,$Zll,lsr#4
eor $Zll,$Zll,$Zlh,lsl#28
eor $Zlh,$Tlh,$Zlh,lsr#4
+#if __ARM_ARCH__>=4
ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
+#else
+ ldrb $Tll,[$rem_4bit,$nhi]
+ add $Tlh,$nhi,#1
+ ldrb $Tlh,[$rem_4bit,$Tlh]
+ orr $Tll,$Tll,$Tlh,lsl#8
+#endif
eor $Zlh,$Zlh,$Zhl,lsl#28
eor $Zhl,$Thl,$Zhl,lsr#4
eor $Zhl,$Zhl,$Zhh,lsl#28
|
